Processor registers

YiffCore utilizes 32 general-purpose registers for various data movement operations, to differentiate between temporaries and other registers, the temporaries are known as CUM stores (the SoC has many holes :3):

ZR          :     Fixed to zero, writes are ignored
CUM1    :     Temporary data
CUM1    :     Temporary data
CUM2    :     Temporary data
CUM3    :     Temporary data
CUM4    :     Temporary data
CUM5    :     Temporary data
SP         :      Stack pointer
FP         :      Frame pointer
TP         :      Per-thread data pointer
GP         :      Global data pointer
RA         :      Return address
A0          :      Function argument 1
A1          :      Function argument 2
A2          :      Function argument 3
A3          :      Function argument 4
A4          :      Function argument 5
A5          :      Function argument 6
S0          :      Saved register 0
S1          :      Saved register 0
S2          :      Saved register 0
S3          :      Saved register 0
S4          :      Saved register 0
S5          :      Saved register 0
S6          :      Saved register 0
S7          :      Saved register 0
S8          :      Saved register 0
S9          :      Saved register 0
S10        :      Saved register 0
S11        :      Saved register 0
S12        :      Saved register 0
S13        :      Saved register 0